Stevenson/LargeRegFile
large register file, digital circuit optimization
Name 
LargeRegFile 
Group 
Stevenson 
Matrix ID 
2273 
Num Rows

2,111,154 
Num Cols

801,374 
Nonzeros

4,944,201 
Pattern Entries

4,944,201 
Kind

Circuit Simulation Problem 
Symmetric

No 
Date

2010 
Author

J. Stevenson 
Editor

T. Davis 
Structural Rank 
801,374 
Structural Rank Full 
true 
Num Dmperm Blocks

32,778 
Strongly Connect Components

2 
Num Explicit Zeros

0 
Pattern Symmetry

0% 
Numeric Symmetry

0% 
Cholesky Candidate

no 
Positive Definite

no 
Type

real 
Download 
MATLAB
Rutherford Boeing
Matrix Market

Notes 
Circuit optimization for digital circuits. John Peter Stevenson, Stanford.
LargeRegFile is a matrix representing an optimization problem.
Specifically, it is a geometric program, a kind of convex optimization
problem. The matrix entries are the exponents found in the geometric
program constraints; specifically, this matrix is a portion of the
input required by mskexpopt:
http://docs.mosek.com/6.0/capi/node008.html
This matrix represents a digital circuit. The circuit is a large
register file: 256 registers, 64 bits each, 2 read ports, 1 write port.
The optimization problem is to minimize circuit delay, subject to
constraints on energy cost and area cost. The optimization variables
are the transistor size, the supply voltage, and the threshold voltage.
The circuit optimization method is described by Patil, et. al.: Robust
energyefficient adder topologies. In ARITH07: Proceedings of the 18th
IEEE Symposium on Computer Arithmetic, pages 1628, Washington, DC,
USA, 2007. IEEE Computer Society.
